SPEC CPU®2017 Floating Point Rate Result

Copyright 2017-2022 Standard Performance Evaluation Corporation

Hewlett Packard Enterprise (Test Sponsor: HPE)

ProLiant DL20 Gen10 Plus
(2.60 GHz, Intel Xeon E-2378)

SPECrate®2017_fp_base = 56.10

SPECrate®2017_fp_peak = 59.70

CPU2017 License: 3 Test Date: Mar-2022
Test Sponsor: HPE Hardware Availability: Jan-2022
Tested by: HPE Software Availability: Jun-2021

Benchmark result graphs are available in the PDF report.

Hardware
CPU Name: Intel Xeon E-2378
  Max MHz: 4800
  Nominal: 2600
Enabled: 8 cores, 1 chip, 2 threads/core
Orderable: 1 chip
Cache L1: 32 KB I + 48 KB D on chip per core
  L2: 512 KB I+D on chip per core
  L3: 16 MB I+D on chip per chip
  Other: None
Memory: 128 GB (4 x 32 GB 2Rx8 PC4-3200AA-E, running at
2933)
Storage: 1 x 480 GB SATA SSD, RAID 0
Other: None
Software
OS: SUSE Linux Enterprise Server 15 SP3
Kernel 5.3.18-57-default
Compiler: C/C++: Version 2021.1 of Intel oneAPI DPC++/C++
Compiler Build 20201113 for Linux;
Fortran: Version 2021.1 of Intel Fortran Compiler
Classic Build 20201112 for Linux;
C/C++: Version 2021.1 of Intel C/C++ Compiler
Classic Build 20201112 for Linux
Parallel: No
Firmware: HPE BIOS Version U60 v1.54 01/13/2022 released
Jan-2022
File System: xfs
System State: Run level 3 (multi-user)
Base Pointers: 64-bit
Peak Pointers: 64-bit
Other: jemalloc memory allocator V5.0.1
Power Management: BIOS set to prefer performance at the cost of
additional power usage

Results Table

Benchmark Base Peak
Copies Seconds Ratio Seconds Ratio Seconds Ratio Copies Seconds Ratio Seconds Ratio Seconds Ratio
SPECrate®2017_fp_base 56.10
SPECrate®2017_fp_peak 59.70
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
503.bwaves_r 16 1863 86.1 1864 86.1 1862 86.2 8 877 91.5 877 91.5 877 91.5
507.cactuBSSN_r 16 237 85.5 236 85.7 237 85.5 16 237 85.5 236 85.7 237 85.5
508.namd_r 16 283 53.7 282 53.9 282 54.0 16 283 53.7 282 53.9 282 54.0
510.parest_r 16 1758 23.8 1757 23.8 1761 23.8 8 683 30.6 683 30.7 681 30.7
511.povray_r 16 473 78.9 471 79.4 471 79.3 16 407 91.9 408 91.5 406 92.0
519.lbm_r 16 539 31.3 538 31.3 538 31.3 16 539 31.3 538 31.3 538 31.3
521.wrf_r 16 856 41.8 861 41.6 858 41.8 8 415 43.2 416 43.1 416 43.0
526.blender_r 16 342 71.2 340 71.7 340 71.6 16 342 71.2 340 71.7 340 71.6
527.cam4_r 16 419 66.7 420 66.6 422 66.4 16 419 66.7 420 66.6 422 66.4
538.imagick_r 16 219 1820 219 1820 218 1830 16 219 1820 219 1820 218 1830
544.nab_r 16 221 1220 223 1210 222 1210 16 218 1230 221 1220 219 1230
549.fotonik3d_r 16 2257 27.6 2257 27.6 2247 27.7 16 2257 27.6 2257 27.6 2247 27.7
554.roms_r 16 1341 19.0 1343 18.9 1343 18.9 8 492 25.9 493 25.8 492 25.8

Submit Notes

 The taskset mechanism was used to bind copies to processors. The config file option 'submit'
 was used to generate taskset commands to bind each copy to a specific processor.
 For details, please see the config file.

Operating System Notes

 Stack size set to unlimited using "ulimit -s unlimited"
 Transparent Huge Pages enabled by default
 Prior to runcpu invocation
 Filesystem page cache synced and cleared with:
 sync; echo 3 >       /proc/sys/vm/drop_caches

Environment Variables Notes

Environment variables set by runcpu before the start of the run:
LD_LIBRARY_PATH = "/home/cpu2017/lib/intel64:/home/cpu2017/je5.0.1-64"
MALLOC_CONF = "retain:true"

General Notes

 Binaries compiled on a system with 1x Intel Core i9-7980XE CPU + 64GB RAM
 memory using Red Hat Enterprise Linux 8.1
NA: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown)
is mitigated in the system as tested and documented.
Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1)
is mitigated in the system as tested and documented.
Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2)
is mitigated in the system as tested and documented.
 jemalloc, a general purpose malloc implementation
 built with the RedHat Enterprise 7.5, and the system compiler gcc 4.8.5
 sources available from jemalloc.net or https://github.com/jemalloc/jemalloc/releases

Platform Notes

  BIOS Configuration:
  Workload Profile set to General Throughput Compute
  Thermal Configuration set to Maximum Cooling
  Enhanced Processor Performance set to Enabled
  Last Level Cache (LLC) prefetch set to Enabled
  Workload Profile set to Custom
   HW Prefetcher set to Disabled

 Sysinfo program /home/cpu2017/bin/sysinfo
 Rev: r6622 of 2021-04-07 982a61ec0915b55891ef0e16acafc64d
 running on localhost Wed Mar 16 12:33:07 2022

 SUT (System Under Test) info as seen by some common utilities.
 For more information on this section, see
    https://www.spec.org/cpu2017/Docs/config.html#sysinfo

 From /proc/cpuinfo
    model name : Intel(R) Xeon(R) E-2378 CPU @ 2.60GHz
       1  "physical id"s (chips)
       16 "processors"
    cores, siblings (Caution: counting these is hw and system dependent. The following
    excerpts from /proc/cpuinfo might not be reliable.  Use with caution.)
       cpu cores : 8
       siblings  : 16
       physical 0: cores 0 1 2 3 4 5 6 7

 From lscpu from util-linux 2.36.2:
      Architecture:                    x86_64
      CPU op-mode(s):                  32-bit, 64-bit
      Byte Order:                      Little Endian
      Address sizes:                   39 bits physical, 48 bits virtual
      CPU(s):                          16
      On-line CPU(s) list:             0-15
      Thread(s) per core:              2
      Core(s) per socket:              8
      Socket(s):                       1
      NUMA node(s):                    1
      Vendor ID:                       GenuineIntel
      CPU family:                      6
      Model:                           167
      Model name:                      Intel(R) Xeon(R) E-2378 CPU @ 2.60GHz
      Stepping:                        1
      CPU MHz:                         4460.161
      BogoMIPS:                        5184.00
      Virtualization:                  VT-x
      L1d cache:                       384 KiB
      L1i cache:                       256 KiB
      L2 cache:                        4 MiB
      L3 cache:                        16 MiB
      NUMA node0 CPU(s):               0-15
      Vulnerability Itlb multihit:     Not affected
      Vulnerability L1tf:              Not affected
      Vulnerability Mds:               Not affected
      Vulnerability Meltdown:          Not affected
      Vulnerability Spec store bypass: Mitigation; Speculative Store Bypass disabled via
      prctl and seccomp
      Vulnerability Spectre v1:        Mitigation; usercopy/swapgs barriers and __user
      pointer sanitization
      Vulnerability Spectre v2:        Mitigation; Enhanced IBRS, IBPB conditional, RSB
      filling
      Vulnerability Srbds:             Not affected
      Vulnerability Tsx async abort:   Not affected
      Flags:                           fpu vme de pse tsc msr pae mce cx8 apic sep mtrr
      pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx
      pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology
      nonstop_tsc cpuid aperfmperf tsc_known_freq pni pclmulqdq dtes64 monitor ds_cpl vmx
      smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid sse4_1 sse4_2 x2apic movbe popcnt
      tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault
      epb invpcid_single ssbd ibrs ibpb stibp ibrs_enhanced tpr_shadow vnmi flexpriority
      ept vpid ept_ad fsgsbase tsc_adjust bmi1 avx2 smep bmi2 erms invpcid mpx avx512f
      avx512dq rdseed adx smap avx512ifma clflushopt intel_pt avx512cd sha_ni avx512bw
      avx512vl xsaveopt xsavec xgetbv1 xsaves dtherm ida arat pln pts avx512vbmi umip pku
      ospke avx512_vbmi2 gfni vaes vpclmulqdq avx512_vnni avx512_bitalg avx512_vpopcntdq
      rdpid fsrm md_clear flush_l1d arch_capabilities

 From lscpu --cache:
      NAME ONE-SIZE ALL-SIZE WAYS TYPE        LEVEL  SETS PHY-LINE COHERENCY-SIZE
      L1d       48K     384K   12 Data            1    64        1             64
      L1i       32K     256K    8 Instruction     1    64        1             64
      L2       512K       4M    8 Unified         2  1024        1             64
      L3        16M      16M   16 Unified         3 16384        1             64

 /proc/cpuinfo cache data
    cache size : 16384 KB

 From numactl --hardware
 WARNING: a numactl 'node' might or might not correspond to a physical chip.
   available: 1 nodes (0)
   node 0 cpus: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
   node 0 size: 128741 MB
   node 0 free: 128247 MB
   node distances:
   node   0
     0:  10

 From /proc/meminfo
    MemTotal:       131831360 kB
    HugePages_Total:       0
    Hugepagesize:       2048 kB

 From /etc/*release* /etc/*version*
    os-release:
       NAME="SLES"
       VERSION="15-SP3"
       VERSION_ID="15.3"
       PRETTY_NAME="SUSE Linux Enterprise Server 15 SP3"
       ID="sles"
       ID_LIKE="suse"
       ANSI_COLOR="0;32"
       CPE_NAME="cpe:/o:suse:sles:15:sp3"

 uname -a:
    Linux localhost 5.3.18-57-default #1 SMP Wed Apr 28 10:54:41 UTC 2021 (ba3c2e9) x86_64
    x86_64 x86_64 GNU/Linux

 Kernel self-reported vulnerability status:

 CVE-2018-12207 (iTLB Multihit):                        Not affected
 CVE-2018-3620 (L1 Terminal Fault):                     Not affected
 Microarchitectural Data Sampling:                      Not affected
 CVE-2017-5754 (Meltdown):                              Not affected
 CVE-2018-3639 (Speculative Store Bypass):              Mitigation: Speculative Store
                                                        Bypass disabled via prctl and
                                                        seccomp
 CVE-2017-5753 (Spectre variant 1):                     Mitigation: usercopy/swapgs
                                                        barriers and __user pointer
                                                        sanitization
 CVE-2017-5715 (Spectre variant 2):                     Mitigation: Enhanced IBRS, IBPB:
                                                        conditional, RSB filling
 CVE-2020-0543 (Special Register Buffer Data Sampling): Not affected
 CVE-2019-11135 (TSX Asynchronous Abort):               Not affected

 run-level 3 Mar 16 12:32

 SPEC is set to: /home/cpu2017
    Filesystem     Type  Size  Used Avail Use% Mounted on
    /dev/sda4      xfs   404G   68G  336G  17% /home

 From /sys/devices/virtual/dmi/id
     Vendor:         HPE
     Product:        ProLiant DL20 Gen10 Plus
     Product Family: ProLiant
     Serial:         SerNum.ACC

 Additional information from dmidecode 3.2 follows.  WARNING: Use caution when you
 interpret this section. The 'dmidecode' program reads system data which is "intended to
 allow hardware to be accurately determined", but the intent may not be met, as there are
 frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard.
   Memory:
     4x Hynix HMAA4GU7AJR8N-XN 32 GB 2 rank 3200, configured at 2933

 BIOS:
    BIOS Vendor:       HPE
    BIOS Version:      U60
    BIOS Date:         01/13/2022
    BIOS Revision:     1.54
    Firmware Revision: 2.55

 (End of data from sysinfo program)

Compiler Version Notes

==============================================================================
C               | 519.lbm_r(base, peak) 538.imagick_r(base, peak)
                | 544.nab_r(base, peak)
------------------------------------------------------------------------------
Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64,
  Version 2021.1 Build 20201113
Copyright (C) 1985-2020 Intel Corporation. All rights reserved.
------------------------------------------------------------------------------

==============================================================================
C++             | 508.namd_r(base, peak) 510.parest_r(base, peak)
------------------------------------------------------------------------------
Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64,
  Version 2021.1 Build 20201113
Copyright (C) 1985-2020 Intel Corporation. All rights reserved.
------------------------------------------------------------------------------

==============================================================================
C++, C          | 511.povray_r(peak)
------------------------------------------------------------------------------
Intel(R) C++ Intel(R) 64 Compiler Classic for applications running on
  Intel(R) 64, Version 2021.1 Build 20201112_000000
Copyright (C) 1985-2020 Intel Corporation.  All rights reserved.
Intel(R) C Intel(R) 64 Compiler Classic for applications running on Intel(R)
  64, Version 2021.1 Build 20201112_000000
Copyright (C) 1985-2020 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
C++, C          | 511.povray_r(base) 526.blender_r(base, peak)
------------------------------------------------------------------------------
Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64,
  Version 2021.1 Build 20201113
Copyright (C) 1985-2020 Intel Corporation. All rights reserved.
Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64,
  Version 2021.1 Build 20201113
Copyright (C) 1985-2020 Intel Corporation. All rights reserved.
------------------------------------------------------------------------------

==============================================================================
C++, C          | 511.povray_r(peak)
------------------------------------------------------------------------------
Intel(R) C++ Intel(R) 64 Compiler Classic for applications running on
  Intel(R) 64, Version 2021.1 Build 20201112_000000
Copyright (C) 1985-2020 Intel Corporation.  All rights reserved.
Intel(R) C Intel(R) 64 Compiler Classic for applications running on Intel(R)
  64, Version 2021.1 Build 20201112_000000
Copyright (C) 1985-2020 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
C++, C          | 511.povray_r(base) 526.blender_r(base, peak)
------------------------------------------------------------------------------
Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64,
  Version 2021.1 Build 20201113
Copyright (C) 1985-2020 Intel Corporation. All rights reserved.
Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64,
  Version 2021.1 Build 20201113
Copyright (C) 1985-2020 Intel Corporation. All rights reserved.
------------------------------------------------------------------------------

==============================================================================
C++, C, Fortran | 507.cactuBSSN_r(base, peak)
------------------------------------------------------------------------------
Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64,
  Version 2021.1 Build 20201113
Copyright (C) 1985-2020 Intel Corporation. All rights reserved.
Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64,
  Version 2021.1 Build 20201113
Copyright (C) 1985-2020 Intel Corporation. All rights reserved.
Intel(R) Fortran Intel(R) 64 Compiler Classic for applications running on
  Intel(R) 64, Version 2021.1 Build 20201112_000000
Copyright (C) 1985-2020 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
Fortran         | 503.bwaves_r(base, peak) 549.fotonik3d_r(base, peak)
                | 554.roms_r(base, peak)
------------------------------------------------------------------------------
Intel(R) Fortran Intel(R) 64 Compiler Classic for applications running on
  Intel(R) 64, Version 2021.1 Build 20201112_000000
Copyright (C) 1985-2020 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
Fortran, C      | 521.wrf_r(peak)
------------------------------------------------------------------------------
Intel(R) Fortran Intel(R) 64 Compiler Classic for applications running on
  Intel(R) 64, Version 2021.1 Build 20201112_000000
Copyright (C) 1985-2020 Intel Corporation.  All rights reserved.
Intel(R) C Intel(R) 64 Compiler Classic for applications running on Intel(R)
  64, Version 2021.1 Build 20201112_000000
Copyright (C) 1985-2020 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
Fortran, C      | 521.wrf_r(base) 527.cam4_r(base, peak)
------------------------------------------------------------------------------
Intel(R) Fortran Intel(R) 64 Compiler Classic for applications running on
  Intel(R) 64, Version 2021.1 Build 20201112_000000
Copyright (C) 1985-2020 Intel Corporation.  All rights reserved.
Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64,
  Version 2021.1 Build 20201113
Copyright (C) 1985-2020 Intel Corporation. All rights reserved.
------------------------------------------------------------------------------

==============================================================================
Fortran, C      | 521.wrf_r(peak)
------------------------------------------------------------------------------
Intel(R) Fortran Intel(R) 64 Compiler Classic for applications running on
  Intel(R) 64, Version 2021.1 Build 20201112_000000
Copyright (C) 1985-2020 Intel Corporation.  All rights reserved.
Intel(R) C Intel(R) 64 Compiler Classic for applications running on Intel(R)
  64, Version 2021.1 Build 20201112_000000
Copyright (C) 1985-2020 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
Fortran, C      | 521.wrf_r(base) 527.cam4_r(base, peak)
------------------------------------------------------------------------------
Intel(R) Fortran Intel(R) 64 Compiler Classic for applications running on
  Intel(R) 64, Version 2021.1 Build 20201112_000000
Copyright (C) 1985-2020 Intel Corporation.  All rights reserved.
Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64,
  Version 2021.1 Build 20201113
Copyright (C) 1985-2020 Intel Corporation. All rights reserved.
------------------------------------------------------------------------------

Base Compiler Invocation

C benchmarks:

 icx 

C++ benchmarks:

 icpx 

Fortran benchmarks:

 ifort 

Benchmarks using both Fortran and C:

 ifort   icx 

Benchmarks using both C and C++:

 icpx   icx 

Benchmarks using Fortran, C, and C++:

 icpx   icx   ifort 

Base Portability Flags

503.bwaves_r:  -DSPEC_LP64 
507.cactuBSSN_r:  -DSPEC_LP64 
508.namd_r:  -DSPEC_LP64 
510.parest_r:  -DSPEC_LP64 
511.povray_r:  -DSPEC_LP64 
519.lbm_r:  -DSPEC_LP64 
521.wrf_r:  -DSPEC_LP64   -DSPEC_CASE_FLAG   -convert big_endian 
526.blender_r:  -DSPEC_LP64   -DSPEC_LINUX   -funsigned-char 
527.cam4_r:  -DSPEC_LP64   -DSPEC_CASE_FLAG 
538.imagick_r:  -DSPEC_LP64 
544.nab_r:  -DSPEC_LP64 
549.fotonik3d_r:  -DSPEC_LP64 
554.roms_r:  -DSPEC_LP64 

Base Optimization Flags

C benchmarks:

 -w   -std=c11   -m64   -Wl,-z,muldefs   -xCORE-AVX512   -Ofast   -ffast-math   -flto   -mfpmath=sse   -funroll-loops   -qopt-mem-layout-trans=4   -mbranches-within-32B-boundaries   -ljemalloc   -L/usr/local/jemalloc64-5.0.1/lib 

C++ benchmarks:

 -w   -m64   -Wl,-z,muldefs   -xCORE-AVX512   -Ofast   -ffast-math   -flto   -mfpmath=sse   -funroll-loops   -qopt-mem-layout-trans=4   -mbranches-within-32B-boundaries   -ljemalloc   -L/usr/local/jemalloc64-5.0.1/lib 

Fortran benchmarks:

 -w   -m64   -Wl,-z,muldefs   -xCORE-AVX512   -O3   -ipo   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-multiple-gather-scatter-by-shuffles   -qopt-mem-layout-trans=4   -nostandard-realloc-lhs   -align array32byte   -auto   -mbranches-within-32B-boundaries   -ljemalloc   -L/usr/local/jemalloc64-5.0.1/lib 

Benchmarks using both Fortran and C:

 -w   -m64   -std=c11   -Wl,-z,muldefs   -xCORE-AVX512   -Ofast   -ffast-math   -flto   -mfpmath=sse   -funroll-loops   -qopt-mem-layout-trans=4   -O3   -ipo   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-multiple-gather-scatter-by-shuffles   -mbranches-within-32B-boundaries   -nostandard-realloc-lhs   -align array32byte   -auto   -ljemalloc   -L/usr/local/jemalloc64-5.0.1/lib 

Benchmarks using both C and C++:

 -w   -m64   -std=c11   -Wl,-z,muldefs   -xCORE-AVX512   -Ofast   -ffast-math   -flto   -mfpmath=sse   -funroll-loops   -qopt-mem-layout-trans=4   -mbranches-within-32B-boundaries   -ljemalloc   -L/usr/local/jemalloc64-5.0.1/lib 

Benchmarks using Fortran, C, and C++:

 -w   -m64   -std=c11   -Wl,-z,muldefs   -xCORE-AVX512   -Ofast   -ffast-math   -flto   -mfpmath=sse   -funroll-loops   -qopt-mem-layout-trans=4   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-multiple-gather-scatter-by-shuffles   -mbranches-within-32B-boundaries   -nostandard-realloc-lhs   -align array32byte   -auto   -ljemalloc   -L/usr/local/jemalloc64-5.0.1/lib 

Peak Compiler Invocation

C benchmarks:

 icx 

C++ benchmarks:

 icpx 

Fortran benchmarks:

 ifort 

Benchmarks using both Fortran and C:

521.wrf_r:  ifort   icc 
527.cam4_r:  ifort   icx 

Benchmarks using both C and C++:

511.povray_r:  icpc   icc 
526.blender_r:  icpx   icx 

Benchmarks using Fortran, C, and C++:

 icpx   icx   ifort 

Peak Portability Flags

Same as Base Portability Flags

Peak Optimization Flags

C benchmarks:

519.lbm_r:  basepeak = yes 
538.imagick_r:  basepeak = yes 
544.nab_r:  -w   -std=c11   -m64   -Wl,-z,muldefs   -xCORE-AVX512   -flto   -Ofast   -qopt-mem-layout-trans=4   -fimf-accuracy-bits=14:sqrt   -mbranches-within-32B-boundaries   -ljemalloc   -L/usr/local/jemalloc64-5.0.1/lib 

C++ benchmarks:

508.namd_r:  basepeak = yes 
510.parest_r:  -w   -m64   -Wl,-z,muldefs   -xCORE-AVX512   -Ofast   -ffast-math   -flto   -mfpmath=sse   -funroll-loops   -qopt-mem-layout-trans=4   -mbranches-within-32B-boundaries   -ljemalloc   -L/usr/local/jemalloc64-5.0.1/lib 

Fortran benchmarks:

503.bwaves_r:  -w   -m64   -Wl,-z,muldefs   -xCORE-AVX512   -O3   -ipo   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-multiple-gather-scatter-by-shuffles   -qopt-mem-layout-trans=4   -nostandard-realloc-lhs   -align array32byte   -auto   -mbranches-within-32B-boundaries   -ljemalloc   -L/usr/local/jemalloc64-5.0.1/lib 
549.fotonik3d_r:  basepeak = yes 
554.roms_r:  Same as 503.bwaves_r 

Benchmarks using both Fortran and C:

521.wrf_r:  -prof-gen(pass 1)   -prof-use(pass 2)   -xCORE-AVX512   -O3   -ipo   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-multiple-gather-scatter-by-shuffles   -qopt-mem-layout-trans=4   -mbranches-within-32B-boundaries   -nostandard-realloc-lhs   -align array32byte   -auto   -L/usr/local/jemalloc64-5.0.1/lib   -ljemalloc 
527.cam4_r:  basepeak = yes 

Benchmarks using both C and C++:

511.povray_r:  -prof-gen(pass 1)   -prof-use(pass 2)   -xCORE-AVX512   -O3   -ipo   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-multiple-gather-scatter-by-shuffles   -qopt-mem-layout-trans=4   -mbranches-within-32B-boundaries   -L/usr/local/jemalloc64-5.0.1/lib   -ljemalloc 
526.blender_r:  basepeak = yes 

Benchmarks using Fortran, C, and C++:

507.cactuBSSN_r:  basepeak = yes 

The flags files that were used to format this result can be browsed at
http://www.spec.org/cpu2017/flags/HPE-Platform-Flags-Intel-V1.0-ICX-revE.html,
http://www.spec.org/cpu2017/flags/Intel-ic2021-official-linux64_revA.html.

You can also download the XML flags sources by saving the following links:
http://www.spec.org/cpu2017/flags/HPE-Platform-Flags-Intel-V1.0-ICX-revE.xml,
http://www.spec.org/cpu2017/flags/Intel-ic2021-official-linux64_revA.xml.