SPEC CPU(R)2017 Integer Rate Result Supermicro SuperServer 5019C-WR (X11SCW-F , Intel Xeon E-2126G) CPU2017 License: 001176 Test date: Aug-2019 Test sponsor: Supermicro Hardware availability: Nov-2018 Tested by: Supermicro Software availability: Nov-2018 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate --------------- ------- --------- --------- ------- --------- --------- 500.perlbench_r 6 286 33.4 S 6 245 38.9 * 500.perlbench_r 6 286 33.4 * 6 246 38.8 S 500.perlbench_r 6 286 33.4 S 6 245 39.0 S 502.gcc_r 6 240 35.4 * 6 207 41.0 S 502.gcc_r 6 240 35.4 S 6 208 40.9 * 502.gcc_r 6 240 35.3 S 6 208 40.9 S 505.mcf_r 6 208 46.7 S 6 208 46.7 S 505.mcf_r 6 207 46.7 * 6 207 46.8 S 505.mcf_r 6 207 46.8 S 6 208 46.7 * 520.omnetpp_r 6 374 21.1 S 6 375 21.0 S 520.omnetpp_r 6 375 21.0 S 6 374 21.0 * 520.omnetpp_r 6 374 21.0 * 6 374 21.0 S 523.xalancbmk_r 6 136 46.7 S 6 134 47.3 S 523.xalancbmk_r 6 136 46.6 * 6 135 47.1 * 523.xalancbmk_r 6 136 46.5 S 6 135 47.1 S 525.x264_r 6 117 89.9 S 6 113 92.9 S 525.x264_r 6 117 89.8 S 6 113 93.0 S 525.x264_r 6 117 89.9 * 6 113 92.9 * 531.deepsjeng_r 6 210 32.8 * 6 209 32.8 * 531.deepsjeng_r 6 210 32.8 S 6 210 32.8 S 531.deepsjeng_r 6 210 32.8 S 6 209 32.8 S 541.leela_r 6 351 28.3 S 6 351 28.3 S 541.leela_r 6 351 28.3 * 6 350 28.4 S 541.leela_r 6 350 28.4 S 6 350 28.4 * 548.exchange2_r 6 208 75.7 * 6 206 76.2 S 548.exchange2_r 6 206 76.2 S 6 208 75.7 S 548.exchange2_r 6 209 75.3 S 6 206 76.2 * 557.xz_r 6 317 20.5 S 6 316 20.5 S 557.xz_r 6 316 20.5 S 6 316 20.5 S 557.xz_r 6 316 20.5 * 6 316 20.5 * ================================================================================= 500.perlbench_r 6 286 33.4 * 6 245 38.9 * 502.gcc_r 6 240 35.4 * 6 208 40.9 * 505.mcf_r 6 207 46.7 * 6 208 46.7 * 520.omnetpp_r 6 374 21.0 * 6 374 21.0 * 523.xalancbmk_r 6 136 46.6 * 6 135 47.1 * 525.x264_r 6 117 89.9 * 6 113 92.9 * 531.deepsjeng_r 6 210 32.8 * 6 209 32.8 * 541.leela_r 6 351 28.3 * 6 350 28.4 * 548.exchange2_r 6 208 75.7 * 6 206 76.2 * 557.xz_r 6 316 20.5 * 6 316 20.5 * SPECrate(R)2017_int_base 38.4 SPECrate(R)2017_int_peak 39.8 HARDWARE -------- CPU Name: Intel Xeon E-2126G Max MHz: 4500 Nominal: 3300 Enabled: 6 cores, 1 chip Orderable: 1 chip Cache L1: 32 KB I + 32 KB D on chip per core L2: 256 KB I+D on chip per core L3: 12 MB I+D on chip per chip Other: None Memory: 64 GB (4 x 16 GB 2Rx8 PC4-2666V-E) Storage: 1 x 200 GB SATA III SSD Other: None SOFTWARE -------- OS: SUSE Linux Enterprise Server 12 SP3 (x86_64) Kernel 4.4.114-94.11-default Compiler: C/C++: Version 19.0.1.144 of Intel C/C++ Compiler for Linux; Fortran: Version 19.0.1.144 of Intel Fortran Compiler for Linux Parallel: No Firmware: Version 1.0b released May-2019 File System: xfs System State: Run level 3 (multi-user) Base Pointers: 64-bit Peak Pointers: 32/64-bit Other: jemalloc memory allocator V5.0.1 Power Management: -- Submit Notes ------------ The taskset mechanism was used to bind copies to processors. The config file option 'submit' was used to generate taskset commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" General Notes ------------- Environment variables set by runcpu before the start of the run: LD_LIBRARY_PATH = "/home/cpu2017/lib/ia32:/home/cpu2017/lib/intel64:/home/cpu2017/je5.0.1-32:/home/cpu2017/je5.0.1-64" Binaries compiled on a system with 1x Intel Core i9-7900X CPU + 32GB RAM memory using Redhat Enterprise Linux 7.5 Transparent Huge Pages enabled by default Prior to runcpu invocation Filesystem page cache synced and cleared with: sync; echo 3> /proc/sys/vm/drop_caches Yes: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2) is mitigated in the system as tested and documented. jemalloc, a general purpose malloc implementation built with the RedHat Enterprise 7.5, and the system compiler gcc 4.8.5 sources available from jemalloc.net or https://github.com/jemalloc/jemalloc/releases Platform Notes -------------- Sysinfo program /home/cpu2017/bin/sysinfo Rev: r5974 of 2018-05-19 9bcde8f2999c33d61f64985e45859ea9 running on linux-65nv Fri Aug 30 12:25:24 2019 SUT (System Under Test) info as seen by some common utilities. For more information on this section, see https://www.spec.org/cpu2017/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) E-2126G CPU @ 3.30GHz 1 "physical id"s (chips) 6 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 6 siblings : 6 physical 0: cores 0 1 2 3 4 5 From lscpu: Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Byte Order: Little Endian CPU(s): 6 On-line CPU(s) list: 0-5 Thread(s) per core: 1 Core(s) per socket: 6 Socket(s): 1 NUMA node(s): 1 Vendor ID: GenuineIntel CPU family: 6 Model: 158 Model name: Intel(R) Xeon(R) E-2126G CPU @ 3.30GHz Stepping: 10 CPU MHz: 4494.115 CPU max MHz: 4500.0000 CPU min MHz: 800.0000 BogoMIPS: 6623.98 Virtualization: VT-x L1d cache: 32K L1i cache: 32K L2 cache: 256K L3 cache: 12288K NUMA node0 CPU(s): 0-5 Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch ida arat epb invpcid_single pln pts dtherm hwp hwp_notify hwp_act_window hwp_epp intel_pt rsb_ctxsw spec_ctrl retpoline kaiser tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm mpx rdseed adx smap clflushopt xsaveopt xsavec xgetbv1 /proc/cpuinfo cache data cache size : 12288 KB From numactl --hardware WARNING: a numactl 'node' might or might not correspond to a physical chip. available: 1 nodes (0) node 0 cpus: 0 1 2 3 4 5 node 0 size: 64332 MB node 0 free: 63560 MB node distances: node 0 0: 10 From /proc/meminfo MemTotal: 65876628 kB HugePages_Total: 0 Hugepagesize: 2048 kB From /etc/*release* /etc/*version* SuSE-release: SUSE Linux Enterprise Server 12 (x86_64) VERSION = 12 PATCHLEVEL = 3 # This file is deprecated and will be removed in a future service pack or release. # Please check /etc/os-release for details about this release. os-release: NAME="SLES" VERSION="12-SP3" VERSION_ID="12.3" PRETTY_NAME="SUSE Linux Enterprise Server 12 SP3" ID="sles" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sles:12:sp3" uname -a: Linux linux-65nv 4.4.114-94.11-default #1 SMP Thu Feb 1 19:28:26 UTC 2018 (4309ff9) x86_64 x86_64 x86_64 GNU/Linux Kernel self-reported vulnerability status: CVE-2017-5754 (Meltdown): Mitigation: PTI CVE-2017-5753 (Spectre variant 1): Mitigation: Barriers CVE-2017-5715 (Spectre variant 2): Mitigation: IBRS+IBPB run-level 3 Aug 30 10:44 SPEC is set to: /home/cpu2017 Filesystem Type Size Used Avail Use% Mounted on /dev/sda3 xfs 145G 14G 131G 10% /home Additional information from dmidecode follows. WARNING: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. BIOS American Megatrends Inc. 1.0b 05/16/2019 Memory: 4x Micron 18ADF2G72AZ-2G6H1R 16 GB 2 rank 2667 (End of data from sysinfo program) Compiler Version Notes ---------------------- ============================================================================== C | 502.gcc_r(peak) ------------------------------------------------------------------------------ Intel(R) C Intel(R) 64 Compiler for applications running on IA-32, Version 19.0.1.144 Build 20181018 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C | 500.perlbench_r(base, peak) 502.gcc_r(base) 505.mcf_r(base, peak) | 525.x264_r(base, peak) 557.xz_r(base, peak) ------------------------------------------------------------------------------ Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.1.144 Build 20181018 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C | 502.gcc_r(peak) ------------------------------------------------------------------------------ Intel(R) C Intel(R) 64 Compiler for applications running on IA-32, Version 19.0.1.144 Build 20181018 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C | 500.perlbench_r(base, peak) 502.gcc_r(base) 505.mcf_r(base, peak) | 525.x264_r(base, peak) 557.xz_r(base, peak) ------------------------------------------------------------------------------ Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.1.144 Build 20181018 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++ | 523.xalancbmk_r(peak) ------------------------------------------------------------------------------ Intel(R) C++ Intel(R) 64 Compiler for applications running on IA-32, Version 19.0.1.144 Build 20181018 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++ | 520.omnetpp_r(base, peak) 523.xalancbmk_r(base) | 531.deepsjeng_r(base, peak) 541.leela_r(base, peak) ------------------------------------------------------------------------------ Intel(R) C++ Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.1.144 Build 20181018 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++ | 523.xalancbmk_r(peak) ------------------------------------------------------------------------------ Intel(R) C++ Intel(R) 64 Compiler for applications running on IA-32, Version 19.0.1.144 Build 20181018 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++ | 520.omnetpp_r(base, peak) 523.xalancbmk_r(base) | 531.deepsjeng_r(base, peak) 541.leela_r(base, peak) ------------------------------------------------------------------------------ Intel(R) C++ Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.1.144 Build 20181018 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== Fortran | 548.exchange2_r(base, peak) ------------------------------------------------------------------------------ Intel(R) Fortran Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.1.144 Build 20181018 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ Base Compiler Invocation ------------------------ C benchmarks: icc -m64 -std=c11 C++ benchmarks: icpc -m64 Fortran benchmarks: ifort -m64 Base Portability Flags ---------------------- 500.perlbench_r: -DSPEC_LP64 -DSPEC_LINUX_X64 502.gcc_r: -DSPEC_LP64 505.mcf_r: -DSPEC_LP64 520.omnetpp_r: -DSPEC_LP64 523.xalancbmk_r: -DSPEC_LP64 -DSPEC_LINUX 525.x264_r: -DSPEC_LP64 531.deepsjeng_r: -DSPEC_LP64 541.leela_r: -DSPEC_LP64 548.exchange2_r: -DSPEC_LP64 557.xz_r: -DSPEC_LP64 Base Optimization Flags ----------------------- C benchmarks: -Wl,-z,muldefs -xCORE-AVX2 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=4 -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.1.144/linux/compiler/lib/intel64 -lqkmalloc C++ benchmarks: -Wl,-z,muldefs -xCORE-AVX2 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=4 -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.1.144/linux/compiler/lib/intel64 -lqkmalloc Fortran benchmarks: -Wl,-z,muldefs -xCORE-AVX2 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=4 -nostandard-realloc-lhs -align array32byte -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.1.144/linux/compiler/lib/intel64 -lqkmalloc Peak Compiler Invocation ------------------------ C benchmarks (except as noted below): icc -m64 -std=c11 502.gcc_r: icc -m32 -std=c11 -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.1.144/linux/compiler/lib/ia32_lin C++ benchmarks (except as noted below): icpc -m64 523.xalancbmk_r: icpc -m32 -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.1.144/linux/compiler/lib/ia32_lin Fortran benchmarks: ifort -m64 Peak Portability Flags ---------------------- 500.perlbench_r: -DSPEC_LP64 -DSPEC_LINUX_X64 502.gcc_r: -D_FILE_OFFSET_BITS=64 505.mcf_r: -DSPEC_LP64 520.omnetpp_r: -DSPEC_LP64 523.xalancbmk_r: -D_FILE_OFFSET_BITS=64 -DSPEC_LINUX 525.x264_r: -DSPEC_LP64 531.deepsjeng_r: -DSPEC_LP64 541.leela_r: -DSPEC_LP64 548.exchange2_r: -DSPEC_LP64 557.xz_r: -DSPEC_LP64 Peak Optimization Flags ----------------------- C benchmarks: 500.perlbench_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX2 -O3 -no-prec-div -qopt-mem-layout-trans=4 -fno-strict-overflow -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.1.144/linux/compiler/lib/intel64 -lqkmalloc 502.gcc_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX2 -O3 -no-prec-div -qopt-mem-layout-trans=4 -L/usr/local/je5.0.1-32/lib -ljemalloc 505.mcf_r: -Wl,-z,muldefs -xCORE-AVX2 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=4 -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.1.144/linux/compiler/lib/intel64 -lqkmalloc 525.x264_r: -Wl,-z,muldefs -xCORE-AVX2 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=4 -fno-alias -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.1.144/linux/compiler/lib/intel64 -lqkmalloc 557.xz_r: Same as 505.mcf_r C++ benchmarks: 520.omnetpp_r: -Wl,-z,muldefs -xCORE-AVX2 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=4 -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.1.144/linux/compiler/lib/intel64 -lqkmalloc 523.xalancbmk_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX2 -O3 -no-prec-div -qopt-mem-layout-trans=4 -L/usr/local/je5.0.1-32/lib -ljemalloc 531.deepsjeng_r: Same as 520.omnetpp_r 541.leela_r: Same as 520.omnetpp_r Fortran benchmarks: -Wl,-z,muldefs -xCORE-AVX2 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=4 -nostandard-realloc-lhs -align array32byte -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.1.144/linux/compiler/lib/intel64 -lqkmalloc The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2017/flags/Intel-ic18.0-official-linux64.2019-04-02.html http://www.spec.org/cpu2017/flags/Default-Platform-Flags.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2017/flags/Intel-ic18.0-official-linux64.2019-04-02.xml http://www.spec.org/cpu2017/flags/Default-Platform-Flags.xml SPEC CPU and SPECrate are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ---------------------------------------------------------------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact info@spec.org. Copyright 2017-2019 Standard Performance Evaluation Corporation Tested with SPEC CPU(R)2017 v1.0.5 on 2019-08-30 00:25:23-0400. Report generated on 2019-09-17 16:13:44 by CPU2017 text formatter v6255. Originally published on 2019-09-17.