SPEC(R) CPU2017 Integer Rate Result Supermicro SuperServer 5019C-M4L (X11SCL-LN4F , Intel Xeon E-2146G) CPU2017 License: 001176 Test date: Oct-2018 Test sponsor: Supermicro Hardware availability: Nov-2018 Tested by: Supermicro Software availability: Mar-2018 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate --------------- ------- --------- --------- ------- --------- --------- 500.perlbench_r 12 545 35.0 * 12 453 42.2 S 500.perlbench_r 12 545 35.0 S 12 455 42.0 S 500.perlbench_r 12 553 34.5 S 12 454 42.1 * 502.gcc_r 12 477 35.6 S 12 375 45.3 * 502.gcc_r 12 474 35.9 S 12 373 45.5 S 502.gcc_r 12 475 35.8 * 12 375 45.3 S 505.mcf_r 12 418 46.4 S 12 438 44.3 S 505.mcf_r 12 432 44.9 * 12 431 45.0 S 505.mcf_r 12 432 44.9 S 12 431 45.0 * 520.omnetpp_r 12 807 19.5 * 12 807 19.5 * 520.omnetpp_r 12 802 19.6 S 12 802 19.6 S 520.omnetpp_r 12 813 19.4 S 12 813 19.4 S 523.xalancbmk_r 12 337 37.6 S 12 262 48.3 S 523.xalancbmk_r 12 342 37.1 * 12 263 48.2 * 523.xalancbmk_r 12 344 36.9 S 12 264 48.0 S 525.x264_r 12 237 88.5 * 12 225 93.4 S 525.x264_r 12 238 88.3 S 12 225 93.2 * 525.x264_r 12 229 91.6 S 12 226 93.1 S 531.deepsjeng_r 12 348 39.5 S 12 348 39.5 S 531.deepsjeng_r 12 356 38.7 * 12 356 38.7 * 531.deepsjeng_r 12 357 38.5 S 12 357 38.5 S 541.leela_r 12 567 35.1 S 12 558 35.6 * 541.leela_r 12 565 35.2 * 12 568 35.0 S 541.leela_r 12 559 35.6 S 12 556 35.8 S 548.exchange2_r 12 377 83.4 S 12 377 83.4 S 548.exchange2_r 12 377 83.4 * 12 377 83.4 * 548.exchange2_r 12 374 84.1 S 12 374 84.1 S 557.xz_r 12 505 25.7 S 12 505 25.7 S 557.xz_r 12 510 25.4 S 12 510 25.4 S 557.xz_r 12 509 25.5 * 12 509 25.5 * ================================================================================= 500.perlbench_r 12 545 35.0 * 12 454 42.1 * 502.gcc_r 12 475 35.8 * 12 375 45.3 * 505.mcf_r 12 432 44.9 * 12 431 45.0 * 520.omnetpp_r 12 807 19.5 * 12 807 19.5 * 523.xalancbmk_r 12 342 37.1 * 12 263 48.2 * 525.x264_r 12 237 88.5 * 12 225 93.2 * 531.deepsjeng_r 12 356 38.7 * 12 356 38.7 * 541.leela_r 12 565 35.2 * 12 558 35.6 * 548.exchange2_r 12 377 83.4 * 12 377 83.4 * 557.xz_r 12 509 25.5 * 12 509 25.5 * SPECrate2017_int_base 40.0 SPECrate2017_int_peak 43.1 HARDWARE -------- CPU Name: Intel Xeon E-2146G Max MHz.: 4500 Nominal: 3500 Enabled: 6 cores, 1 chip, 2 threads/core Orderable: 1 chip Cache L1: 32 KB I + 32 KB D on chip per core L2: 256 KB I+D on chip per core L3: 12 MB I+D on chip per chip Other: None Memory: 64 GB (4 x 16 GB 2Rx8 PC4-2666V-E) Storage: 1 x 2 TB SATA III 7200 RPM Other: None SOFTWARE -------- OS: SUSE Linux Enterprise Server 12 SP3 Kernel 4.4.114-94.11-default Compiler: C/C++: Version 18.0.2.199 of Intel C/C++ Compiler for Linux; Fortran: Version 18.0.2.199 of Intel Fortran Compiler for Linux Parallel: No Firmware: Supermicro BIOS version 1.0 released Sep-2018 File System: xfs System State: Run level 3 (multi-user) Base Pointers: 64-bit Peak Pointers: 32/64-bit Other: jemalloc memory allocator library V5.0.1 Submit Notes ------------ The taskset mechanism was used to bind copies to processors. The config file option 'submit' was used to generate taskset commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" General Notes ------------- Environment variables set by runcpu before the start of the run: LD_LIBRARY_PATH = "/home/cpu2017/lib/ia32:/home/cpu2017/lib/intel64:/home/cpu2017/je5.0.1-32:/home/cpu2017/je5.0.1-64" Binaries compiled on a system with 1x Intel Core i7-6700K CPU + 32GB RAM memory using Redhat Enterprise Linux 7.5 Transparent Huge Pages enabled by default Prior to runcpu invocation Filesystem page cache synced and cleared with: sync; echo 3> /proc/sys/vm/drop_caches Yes: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2) is mitigated in the system as tested and documented. jemalloc, a general purpose malloc implementation built with the RedHat Enterprise 7.5, and the system compiler gcc 4.8.5 sources available from jemalloc.net or https://github.com/jemalloc/jemalloc/releases Platform Notes -------------- Sysinfo program /home/cpu2017/bin/sysinfo Rev: r5797 of 2017-06-14 96c45e4568ad54c135fd618bcc091c0f running on linux-9m9c Mon Oct 29 21:54:06 2018 SUT (System Under Test) info as seen by some common utilities. For more information on this section, see https://www.spec.org/cpu2017/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) E-2146G CPU @ 3.50GHz 1 "physical id"s (chips) 12 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 6 siblings : 12 physical 0: cores 0 1 2 3 4 5 From lscpu: Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Byte Order: Little Endian CPU(s): 12 On-line CPU(s) list: 0-11 Thread(s) per core: 2 Core(s) per socket: 6 Socket(s): 1 NUMA node(s): 1 Vendor ID: GenuineIntel CPU family: 6 Model: 158 Model name: Intel(R) Xeon(R) E-2146G CPU @ 3.50GHz Stepping: 10 CPU MHz: 4201.275 CPU max MHz: 4500.0000 CPU min MHz: 800.0000 BogoMIPS: 7007.98 Virtualization: VT-x L1d cache: 32K L1i cache: 32K L2 cache: 256K L3 cache: 12288K NUMA node0 CPU(s): 0-11 Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch ida arat epb invpcid_single pln pts dtherm hwp hwp_notify hwp_act_window hwp_epp intel_pt rsb_ctxsw spec_ctrl retpoline kaiser tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm mpx rdseed adx smap clflushopt xsaveopt xsavec xgetbv1 /proc/cpuinfo cache data cache size : 12288 KB From numactl --hardware WARNING: a numactl 'node' might or might not correspond to a physical chip. available: 1 nodes (0) node 0 cpus: 0 1 2 3 4 5 6 7 8 9 10 11 node 0 size: 64149 MB node 0 free: 63628 MB node distances: node 0 0: 10 From /proc/meminfo MemTotal: 65689304 kB HugePages_Total: 0 Hugepagesize: 2048 kB /usr/bin/lsb_release -d SUSE Linux Enterprise Server 12 SP3 From /etc/*release* /etc/*version* SuSE-release: SUSE Linux Enterprise Server 12 (x86_64) VERSION = 12 PATCHLEVEL = 3 # This file is deprecated and will be removed in a future service pack or release. # Please check /etc/os-release for details about this release. os-release: NAME="SLES" VERSION="12-SP3" VERSION_ID="12.3" PRETTY_NAME="SUSE Linux Enterprise Server 12 SP3" ID="sles" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sles:12:sp3" uname -a: Linux linux-9m9c 4.4.114-94.11-default #1 SMP Thu Feb 1 19:28:26 UTC 2018 (4309ff9) x86_64 x86_64 x86_64 GNU/Linux run-level 3 Oct 29 21:36 SPEC is set to: /home/cpu2017 Filesystem Type Size Used Avail Use% Mounted on /dev/sda4 xfs 1.8T 123G 1.7T 7% /home Additional information from dmidecode follows. WARNING: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. BIOS American Megatrends Inc. 1.0 09/19/2018 Memory: 4x Micron 18ADF2G72AZ-2G6H1R 16 GB 2 rank 2667 (End of data from sysinfo program) Compiler Version Notes ---------------------- ============================================================================== CC 500.perlbench_r(base) 502.gcc_r(base) 505.mcf_r(base) 525.x264_r(base) 557.xz_r(base) ------------------------------------------------------------------------------ icc (ICC) 18.0.2 20180210 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== CC 500.perlbench_r(peak) 502.gcc_r(peak) 505.mcf_r(peak) 525.x264_r(peak) 557.xz_r(peak) ------------------------------------------------------------------------------ icc (ICC) 18.0.2 20180210 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== CXXC 520.omnetpp_r(base) 523.xalancbmk_r(base) 531.deepsjeng_r(base) 541.leela_r(base) ------------------------------------------------------------------------------ icpc (ICC) 18.0.2 20180210 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== CXXC 520.omnetpp_r(peak) 523.xalancbmk_r(peak) 531.deepsjeng_r(peak) 541.leela_r(peak) ------------------------------------------------------------------------------ icpc (ICC) 18.0.2 20180210 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== FC 548.exchange2_r(base) ------------------------------------------------------------------------------ ifort (IFORT) 18.0.2 20180210 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== FC 548.exchange2_r(peak) ------------------------------------------------------------------------------ ifort (IFORT) 18.0.2 20180210 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ Base Compiler Invocation ------------------------ C benchmarks: icc -m64 -std=c11 C++ benchmarks: icpc -m64 Fortran benchmarks: ifort -m64 Base Portability Flags ---------------------- 500.perlbench_r: -DSPEC_LP64 -DSPEC_LINUX_X64 502.gcc_r: -DSPEC_LP64 505.mcf_r: -DSPEC_LP64 520.omnetpp_r: -DSPEC_LP64 523.xalancbmk_r: -DSPEC_LP64 -DSPEC_LINUX 525.x264_r: -DSPEC_LP64 531.deepsjeng_r: -DSPEC_LP64 541.leela_r: -DSPEC_LP64 548.exchange2_r: -DSPEC_LP64 557.xz_r: -DSPEC_LP64 Base Optimization Flags ----------------------- C benchmarks: -Wl,-z,muldefs -xCORE-AVX2 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/usr/local/je5.0.1-64/lib -ljemalloc C++ benchmarks: -Wl,-z,muldefs -xCORE-AVX2 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/usr/local/je5.0.1-64/lib -ljemalloc Fortran benchmarks: -Wl,-z,muldefs -xCORE-AVX2 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -nostandard-realloc-lhs -L/usr/local/je5.0.1-64/lib -ljemalloc Peak Compiler Invocation ------------------------ C benchmarks (except as noted below): icc -m64 -std=c11 502.gcc_r: icc -m32 -std=c11 -L/home/prasadj/specdev/IC18u2_Internal/lin_18_0_20180210/compiler/lib/ia32_lin C++ benchmarks (except as noted below): icpc -m64 523.xalancbmk_r: icpc -m32 -L/home/prasadj/specdev/IC18u2_Internal/lin_18_0_20180210/compiler/lib/ia32_lin Fortran benchmarks: ifort -m64 Peak Portability Flags ---------------------- 500.perlbench_r: -DSPEC_LP64 -DSPEC_LINUX_X64 502.gcc_r: -D_FILE_OFFSET_BITS=64 505.mcf_r: -DSPEC_LP64 520.omnetpp_r: -DSPEC_LP64 523.xalancbmk_r: -D_FILE_OFFSET_BITS=64 -DSPEC_LINUX 525.x264_r: -DSPEC_LP64 531.deepsjeng_r: -DSPEC_LP64 541.leela_r: -DSPEC_LP64 548.exchange2_r: -DSPEC_LP64 557.xz_r: -DSPEC_LP64 Peak Optimization Flags ----------------------- C benchmarks: 500.perlbench_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX2 -O3 -no-prec-div -qopt-mem-layout-trans=3 -fno-strict-overflow -L/usr/local/je5.0.1-64/lib -ljemalloc 502.gcc_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX2 -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/usr/local/je5.0.1-32/lib -ljemalloc 505.mcf_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX2 -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/usr/local/je5.0.1-64/lib -ljemalloc 525.x264_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX2 -O3 -no-prec-div -qopt-mem-layout-trans=3 -fno-alias -L/usr/local/je5.0.1-64/lib -ljemalloc 557.xz_r: basepeak = yes C++ benchmarks: 520.omnetpp_r: basepeak = yes 523.xalancbmk_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX2 -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/usr/local/je5.0.1-32/lib -ljemalloc 531.deepsjeng_r: basepeak = yes 541.leela_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX2 -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/usr/local/je5.0.1-64/lib -ljemalloc Fortran benchmarks: 548.exchange2_r: basepeak = yes The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2017/flags/Intel-ic18.0-official-linux64.2017-12-21.html http://www.spec.org/cpu2017/flags/Default-Platform-Flags.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2017/flags/Intel-ic18.0-official-linux64.2017-12-21.xml http://www.spec.org/cpu2017/flags/Default-Platform-Flags.xml SPEC is a registered trademark of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. -------------------------------------------------------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact info@spec.org. Copyright 2017-2018 Standard Performance Evaluation Corporation Tested with SPEC CPU2017 v1.0.2 on 2018-10-29 21:54:06-0400. Report generated on 2018-11-27 13:33:28 by CPU2017 ASCII formatter v6067. Originally published on 2018-11-27.